SerDes

Initialization

[at the Deserializer side]

• set 3Gbps or 6Gbps (fixed at the other side via Pins)
• check Link Lock
• TODO: assign Serializer Address by disabling other links

Serializer

• MIPI Rx: reset & enable clock
• Lane Reassignment
• Pixel Mode / Tunnel Mode
• Date Type (DT) selection for pipeline
• DT reassignment
• Bits Per Pixel (BPP) reassignment
• Virtual Channel (VC) reassignment
• [optional] VC remapping
• Debug
• PCLK detect
• DE & VS detect

Deserializer

• enable links
• enable pipelines
• MIPI Tx: Lane Mode and Reassignment
• MIPI Tx: PHY speed
• Pixel Mode / Tunnel Mode
• pipeline route to tx controller
• VC/DT reassignment
• Frame Sync pin map

Sensor

• settings

Example

MAX96792/96793

• GMSL 3 - 12 Gbps
Des: 0x0001, 0x03, // Link A 12 Gbps
Des: 0x0004, 0xc3, // Link B 12 Gbps and both GMSL 3
Des: 0x0028, 0x62, // Link A FEC
Des: 0x5028, 0x62, // Link B FEC
Ser: 0x0001, 0x0c, // 12 Gbps
Ser: 0x0006, 0x00, // GMSL 3
Ser: 0x0028, 0x62, // FEC
• GMSL 2 - 6 Gbps
Des: 0x0001, 0x02, // Link A 6 Gbps
Des: 0x0004, 0x02, // Link B 6 Gbps and both GMSL 2
Des: 0x0028, 0x60, // Link A No FEC
Des: 0x5028, 0x60, // Link B No FEC
Ser: 0x0001, 0x08, // 6 Gbps
Ser: 0x0006, 0x91, // GMSL 2
Ser: 0x0028, 0x60, // No FEC